The semiconductor industry has progressed into nanometer technology process nodes in pursuit of higher device density, higher performance, and lower cost. In the course of integrated circuit (IC) evolution, functional density (i.e., the number of interconnected devices per chip area) has increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process increases production efficiency and lowers associated costs. Such scaling down has also increased the complexity of processing and manufacturing ICs, and, for these advances to be realized, similar developments in IC manufacturing are desired. For example, novel semiconductor materials, including compound semiconductors, are being investigated to supplement or replace conventional silicon substrates. While these alternative semiconductor materials often possess superior electrical characteristics, just as often they possess their own sets of challenges. Accordingly, this transition to more exacting materials is one of the drivers of new fabrication processes. Therefore, although existing semiconductor fabrication process have been adequate, they have not proved entirely satisfactory in all respects.